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Sustainable disturbance crosstalk mitigation in deeply scaled phase-change memory
Sustainable Computing: Informatics and Systems ( IF 3.8 ) Pub Date : 2020-07-04 , DOI: 10.1016/j.suscom.2020.100410
Seyed Mohammad Seyedzadeh , Donald Kline , Alex K. Jones , Rami Melhem

While Phase Change Memory (PCM) is gaining popularity in next generation systems compared to conventional DRAM and Flash, write disturbance due to crosstalk remains a significant challenge to PCM performance and reliability. To address this concern we propose a multi-tiered compression (MTC) technique combined with novel encoding that can decrease the probability of write disturbance. MTC compresses a high proportion (>94%) of cachelines by a small predictable amount (e.g., 40- or 56-bits of a 512-bit block) while maintaining data similarity vital for optimizing PCM writes. By detecting data patterns prone to crosstalk, we use encoding, correction pointers, and a hybrid approach to reduce the instances of write disturbance. We use MTC reclaimed bits to store the encoding. Thus, our approach requires only five additional auxiliary bits per 512-bit cacheline, minimizing the embodied energy (fabrication) overhead to mitigate write disturbance. Additionally, through a multi-objective optimization, dramatic endurance improvements are possible while maintaining nearly all write disturbance improvement.

Our technique improves performance, endurance and write energy by 47%, 42% and 36% versus the state-of-the-art with nominal (circa 1%) increases to embodied energy. When considering the full life-cycle impact, the additional area of our MTC with encoding approach is mitigated by the use-phase benefits within 60 days for a high performance system and in less than four years of use for a desktop system. In nearly all studied scenarios, the improved lifetime provided by our MTC and encoding approach easily recoups the required additional upfront manufacturing energy.



中文翻译:

深度相变存储器中的可持续扰动串扰缓解

与传统的DRAM和闪存相比,相变存储器(PCM)在下一代系统中越来越受欢迎,但由于串扰引起的写干扰仍然是PCM性能和可靠性的重大挑战。为了解决这个问题,我们提出了一种多层压缩(MTC)技术,该技术与新颖的编码相结合,可以降低写入干扰的可能性。MTC通过少量可预测的量(例如,高比例(> 94%)的高速缓存行)进行压缩,512位块的40位或56位),同时保持数据相似性对于优化PCM写入至关重要。通过检测容易发生串扰的数据模式,我们使用编码,校正指针和混合方法来减少写干扰的情况。我们使用MTC回收位来存储编码。因此,我们的方法每条512位高速缓存行仅需要五个额外的辅助位,从而最大程度地降低了实现的能量(制造)开销以减轻写干扰。此外,通过多目标优化,可以在保持几乎所有写入干扰改善的同时显着提高耐用性。

与最新技术相比,我们的技术将性能,耐久性和写入能量提高了47%,42%和36%,其中名义能量(大约1%)增加了体现能量。在考虑整个生命周期的影响时,对于高性能系统,在60天之内以及在桌面系统的使用时间不到四年的情况下,使用阶段的好处可以减少使用编码方法的MTC的额外区域。在几乎所有研究的场景中,我们的MTC和编码方法所提供的更长的使用寿命可以轻松地弥补所需的额外前期制造能量。

更新日期:2020-08-28
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