This paper presents a new high-speed low-power charge-steering latch, using a boosting technique for the tail capacitor, which is charged reversely in the reset phase. This technique decreases the source node voltage of the differential pair, which improves the output voltage swing. Analysis and post-layout simulation results of the proposed boosted charge-steering latch (BCS), in 65 nm CMOS technology, illustrate that for the same output swing and with about 28% tail capacitor of the conventional charge-steering latch, the maximum operating frequency is increased by about 12%. In the case of the same tail capacitor, the BCS latch gives the output swing of about 30% higher than that of conventional one for the low to moderate input swing, while its maximum operating frequency is about 20% higher.

本文提出了一种新型的高速低功耗充电控制锁存器，该锁存器采用了针对尾部电容器的升压技术，该电容器在复位阶段被反向充电。该技术降低了差分对的源节点电压，从而改善了输出电压摆幅。在65 nm CMOS技术中对拟议的升压型电荷控制锁存器（BCS）进行分析和布局后仿真结果表明，对于相同的输出摆幅以及传统电荷控制锁存器具有约28％的尾部电容器，最大工作频率增加了约12％。在使用相同的尾部电容器的情况下，对于低至中等的输入摆幅，BCS锁存器的输出摆幅比传统摆幅高大约30％，而其最大工作频率大约高20％。