A digital polar transmitter is presented that uses a digital-to-time-converter (DTC) for wide-channel phase modulation with multiband support. DTC-based phase modulation enables high-efficiency polar operation with high-efficiency RFDAC. The transmitter uses coarse division inherent in DTC operation to generate TX output frequencies from 0.7 to 2.2 GHz with a limited DCO tuning range of only 7.3–8.7 GHz (±8.7%). Phase modulation of narrowband signals (e.g., one resource block) using DTC could result in spurs in output spectrum due to the almost periodic nature of DTC errors. A theoretical analysis is presented that predicts the location of these spurs and a technique to eliminate such spurs by appropriately adjusting the PLL frequency is introduced. A new digitally controlled-edge-interpolator architecture is also presented to minimize dynamic errors, which is necessary in order to meet stringent cellular noise requirements. The DTC was implemented using digital synthesis and auto-place-and-route (APR) tools, requiring very limited analog layout resources. The TX was fabricated in 14-nm FinFET and it achieved a noise of −153/−150 dBc/Hz for LTE5/LTE20 in Band1 at +4-dBm output power with DTC power dissipation of 27 mW.

中文翻译：

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在 14 纳米 FinFET 中具有 -153dBc/Hz 噪声的基于蜂窝多频带 DTC 的数字极性发射器

提出了一种数字极性发射器，它使用数字时间转换器 (DTC) 进行宽通道相位调制，支持多频段。基于 DTC 的相位调制可通过高效 RFDAC 实现高效极性操作。发射器使用 DTC 操作中固有的粗分频来生成 0.7 至 2.2 GHz 的 TX 输出频率，而 DCO 调谐范围有限，仅为 7.3-8.7 GHz (±8.7%)。由于 DTC 误差的几乎周期性性质，使用 DTC 的窄带信号（例如，一个资源块）的相位调制可能导致输出频谱中的杂散。介绍了预测这些杂散位置的理论分析，并介绍了通过适当调整 PLL 频率来消除此类杂散的技术。还提出了一种新的数控边缘内插器架构，以最大限度地减少动态误差，这是满足严格的蜂窝噪声要求所必需的。DTC 是使用数字综合和自动布局布线 (APR) 工具实现的，需要非常有限的模拟布局资源。TX 采用 14-nm FinFET 制造，它在频段 1 的 LTE5/LTE20 中实现了 -153/-150 dBc/Hz 的噪声，输出功率为 +4-dBm，DTC 功耗为 27 mW。