In recent years, the next-generation non-volatile memory (NVM) technologies have emerged with DRAM-like byte addressability and disk-like durability. Computer architects have proposed to use them to build persistent memory that blurs the conventional boundary between volatile memory and non-volatile storage. However, ARM processors, ones that are widely used in embedded computing systems, start providing architectural supports to utilize NVM since ARMv8. In this article, we consider tailoring B+-tree for NVM operated by a 64-bit ARMv8 processor. We first conduct an empirical study of performance overhead in writing and reading data for a B+-tree with an ARMv8 processor, including the time cost of cache line flushes and memory fences for crash consistency as well as the execution time of binary search compared to that of linear search. We hence identify the key weaknesses in the design of B+-tree with ARMv8 architecture. Accordingly, we develop a new B+-tree variant, namely, <underline>c</underline> rash <underline>r</underline> ecoverable <underline>A</underline> RMv8-oriented <underline>B </underline>+-tree (Crab-tree). To insert and delete data at runtime, Crab-tree selectively chooses one of two strategies, i.e., copy on write and shifting in place, depending on which one causes less consistency cost. Crab-tree regulates a strict execution order in both strategies and recovers the tree structure in case of crashes. To further improve the performance of Crab-tree, we employ three methods to reduce software overhead, cache misses, and consistency cost, respectively. We have implemented and evaluated Crab-tree in Raspberry Pi 3 Model B+ with emulated NVM. Experiments show that Crab-tree significantly outperforms state-of-the-art B+-trees designed for persistent memory by up to 2.2× and 3.7× in write and read performances, respectively, with both consistency and scalability achieved.

中文翻译：

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蟹树

近年来，下一代非易失性存储器（NVM）技术已经出现，具有类似 DRAM 的字节寻址能力和类似磁盘的耐用性。计算机架构师已提议使用它们来构建持久记忆这模糊了易失性存储器和非易失性存储之间的传统界限。然而，广泛用于嵌入式计算系统的 ARM 处理器从 ARMv8 开始提供架构支持以利用 NVM。在本文中，我们考虑为由 64 位 ARMv8 处理器运行的 NVM 定制 B+-tree。我们首先对使用 ARMv8 处理器的 B+-tree 写入和读取数据的性能开销进行了实证研究，包括缓存行刷新的时间成本和用于崩溃一致性的内存栅栏以及二进制搜索的执行时间。的线性搜索。因此，我们确定了采用 ARMv8 架构的 B+-tree 设计中的关键弱点。因此，我们开发了一个新的 B+-tree 变体，即<下划线>c</下划线>皮疹<下划线>r</下划线>可恢复的<下划线>A</下划线>面向 RMv8<下划线>B</underline>+-树（蟹树）。为了在运行时插入和删除数据，Crab-tree 有选择地选择两种策略中的一种，即写时复制和原地移位，这取决于哪一种会降低一致性成本。Crab-tree 在这两种策略中都规定了严格的执行顺序，并在崩溃的情况下恢复树结构。为了进一步提高 Crab-tree 的性能，我们分别采用了三种方法来减少软件开销、缓存未命中和一致性成本。我们已经在具有仿真 NVM 的 Raspberry Pi 3 Model B+ 中实现并评估了 Crab-tree。实验表明，Crab-tree 在写入和读取性能方面明显优于为持久内存设计的最先进的 B+-tree，分别高达 2.2 倍和 3.7 倍，同时实现了一致性和可扩展性。