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PREASC
ACM Transactions on Design Automation of Electronic Systems ( IF 2.2 ) Pub Date : 2020-07-06 , DOI: 10.1145/3388140
Mehran Goli 1 , Rolf Drechsler 1
Affiliation  

The increasing functionality of electronic systems due to the constant evolution of the market requirements makes the non-functional aspects of such systems (e.g., energy consumption, area overhead, or performance) a major concern in the design process. Approximate computing is a promising way to optimize these criteria by trading accuracy within acceptable limits. Since the cost of applying significant structural changes to a given design increases with the stage of development, the optimization solution needs to be incorporated into the design as early as possible. For the early design entry, modeling hardware at the Electronic System Level (ESL) using the SystemC language is nowadays widely used in the industry. To apply approximation techniques to optimize a given SystemC design, designers need to know which parts of the design can be approximated. However, identifying these parts is a crucial and non-trivial starting point of approximate computing, as the incorrect detection of even one critical part as resilient may result in an unacceptable output. This usually requires a significant programming effort by designers, especially when exploring the design space manually. In this article, we present PREASC, a fully automated framework to identify the resilience portions of a given SystemC design. PREASC is based on a combination of static and dynamic analysis methods along with regression analysis techniques (a fast machine learning method providing an accurate function estimation). Once the resilient portions are identified, an approximation degree analysis is performed to determine the maximum error rate that each resilient portion can tolerate. Subsequently, the maximum number of resilient portions that can be approximated at the same time are reported to designers at different granularity levels. The effectiveness of our approach is evaluated using several standard SystemC benchmarks from various domains.

中文翻译:

预置

由于市场需求的不断发展,电子系统的功能不断增加,这使得此类系统的非功能方面(例如,能源消耗、面积开销或性能)成为设计过程中的主要关注点。近似计算是一种通过在可接受的范围内交易准确性来优化这些标准的有前途的方法。由于对给定设计应用重大结构更改的成本随着开发阶段的增加而增加,因此需要尽早将优化解决方案纳入设计。对于早期的设计输入,在电子系统级(ESL) 使用 SystemC 语言现在在业界广泛使用。为了应用近似技术来优化给定的 SystemC 设计,设计人员需要知道可以近似设计的哪些部分。然而,识别这些部分是近似计算的一个关键且重要的起点,因为即使是一个关键部分的错误检测为弹性也可能导致不可接受的输出。这通常需要设计人员进行大量的编程工作,尤其是在手动探索设计空间时。在本文中,我们介绍了 PEASC,这是一个完全自动化的框架,用于识别给定 SystemC 设计的弹性部分。PEASC 基于静态和动态分析方法以及回归分析技术(一种提供准确函数估计的快速机器学习方法)的组合。一旦识别出弹性部分,就执行近似度分析以确定每个弹性部分可以容忍的最大错误率。随后,可以同时近似的弹性部分的最大数量以不同的粒度级别报告给设计人员。我们的方法的有效性是使用来自不同领域的几个标准 SystemC 基准评估的。
更新日期:2020-07-06
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