High-order sub-harmonically injection-locked oscillators have recently been proposed for low phase-noise frequency generation, with carrier-selection capabilities. Though excellent experimental behavior has been demonstrated, the analysis/simulation of these circuits is demanding, due to the high ratio between the oscillation frequency and the frequency of the input source. This work provides an analysis methodology that covers the main aspects of the circuit behavior, including the detection of the locking bands and the prediction of the phase-noise spectral density. Initially, the oscillator in the presence of a multi-harmonic input source is described with a reduced-order envelope-domain formulation, at the oscillation frequency, based on an oscillator-admittance function extracted from harmonic-balance simulations. This allows deriving an expression for the oscillation phase shift with respect to the input source, and the average of this phase shift is shown to evolve continuously in the distinct synchronization bands obtained when varying a tuning voltage. This property can be used to detect the locking bands in circuit-level envelope-domain simulations, which, as shown here, can be done through different Fourier decompositions and sampling rates. The phase noise of the high-order sub-harmonic injection-locked oscillator under an arbitrary periodic input waveform is investigated in detail. The frequency response to the noise sources is described with a semi-analytical formulation, relying on the oscillator-admittance function in injection-locked conditions. The input noise is derived from the timing jitter of the injection source and the phase-noise response is shown to exhibit a low-pass characteristic, which initially follows the up-converted input noise and then the oscillator own noise sources. A method is proposed to identify the key parameters of the derived phase-noise spectrum from envelope-domain simulations. The various analysis methodologies have been applied to a prototype at 2.7 GHz at the sub-harmonic order N = 30 which has been manufactured and measured.

中文翻译：

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高阶次谐波注入锁定振荡器的分析

最近提出了高阶次谐波注入锁定振荡器，用于产生低相位噪声频率，具有载波选择能力。尽管已经证明了出色的实验行为，但由于振荡频率与输入源频率之间的高比率，这些电路的分析/仿真要求很高。这项工作提供了一种分析方法，涵盖了电路行为的主要方面，包括锁定频带的检测和相位噪声频谱密度的预测。最初，基于从谐波平衡模拟中提取的振荡器导纳函数，使用降阶包络域公式在振荡频率处描述存在多谐波输入源的振荡器。这允许导出相对于输入源的振荡相移的表达式，并且该相移的平均值显示为在改变调谐电压时获得的不同同步带中连续演变。此属性可用于检测电路级包络域模拟中的锁定带，如此处所示，可以通过不同的傅里叶分解和采样率来完成。详细研究了任意周期输入波形下高阶次谐波注入锁定振荡器的相位噪声。噪声源的频率响应采用半解析公式描述，依赖于注入锁定条件下的振荡器导纳函数。输入噪声源自注入源的定时抖动，相位噪声响应显示出低通特性，它最初跟随上变频的输入噪声，然后是振荡器自身的噪声源。提出了一种从包络域模拟中识别导出相位噪声谱的关键参数的方法。各种分析方法已应用于 2.7 GHz 次谐波阶的原型ñ= 30 已制造和测量。