In this paper, the chemical vapor deposition (CVD) processing for 4H-SiC epilayer is investigated with particular emphasis on the defects and the noise properties. It is experimentally found that the process parameters of C/Si ratio strongly affect the surface roughness of epilayers and the density of triangular defects (TDs), while no direct correlation between the C/Si ratio and the deep level defect Z_1/2 could be confirmed. By adjusting the C/Si ratio, a decrease of several orders of magnitudes in the noise level for the 4H-SiC Schottky barrier diodes (SBDs) could be achieved attributing to the improved epilayer quality with low TD density and low surface roughness. The work should provide a helpful clue for further improving the device performance of both the 4H-SiC SBDs and the Schottky barrier ultraviolet photodetectors fabricated on commercial 4H-SiC wafers.

中文翻译：

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各种缺陷对4H-SiC肖特基二极管性能的影响及其与外延生长条件的关系。

本文研究了4H-SiC外延层的化学气相沉积（CVD）工艺，重点是缺陷和噪声特性。实验发现，C / Si比的工艺参数强烈影响外延层的表面粗糙度和三角形缺陷（TDs）的密度，而C / Si比与深层缺陷Z _1/2之间没有直接关系可以确认。通过调整C / Si比，可以实现4H-SiC肖特基势垒二极管（SBD）的噪声级降低几个数量级，这归因于具有低TD密度和低表面粗糙度的改善的外延层质量。这项工作应为进一步提高在商用4H-SiC晶片上制造的4H-SiC SBD和肖特基势垒紫外光电探测器的器件性能提供有益的线索。