Abstract Nowadays, computer arithmetic logic units extensively utilize inexact computing to improve performance in nano-electronics. One of the vital computational components in microprocessors and digital signal processors is multiplier. Approximate 4:2 compressor is a key element in an approximate multiplier and the optimal design of the compressor directly guarantees the performance of the multiplier. This paper proposes a new low-power and high-speed approximate 4:2 compressor design which leads to a high-speed multiplier. We have designed an 8-bit Dadda multiplier composed of our new compressor and analyzed the multiplier in terms of the error metrics in comparison with its counterparts. As an image processing application of our multiplier, we compared the quality metrics of the image multiplication for different under-test multipliers obtained from the previous studies considering several benchmark images. The simulations are carried out by HSPICE in 14 nm FinFET Technology and approve the efficiency of our design.

中文翻译：

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FinFET技术中低功耗高速近似压缩器的高效设计

摘要 如今，计算机算术逻辑单元广泛利用不精确计算来提高纳米电子学的性能。微处理器和数字信号处理器中的重要计算组件之一是乘法器。近似4:2压缩器是近似倍增器的关键要素，压缩器的优化设计直接保证了倍增器的性能。本文提出了一种新的低功率和高速近似 4:2 压缩机设计，可实现高速倍增器。我们设计了一个由我们的新压缩器组成的 8 位 Dadda 乘法器，并在与同类产品相比的误差指标方面对乘法器进行了分析。作为我们乘法器的图像处理应用程序，我们比较了考虑几个基准图像的先前研究中获得的不同被测乘法器的图像乘法的质量指标。模拟由 HSPICE 以 14 纳米 FinFET 技术进行，并验证了我们设计的效率。