A nano-power all-MOS voltage reference circuit is proposed without any integrated resistor or bipolar transistor to generate multiple voltage sources in inexpensive digital CMOS technologies. The design is based on a current-driven voltage reference core made by standard nMOS transistors only, and can be powered up by a flexible biasing current with no consideration on its temperature characteristics. The sensitive core is shielded from the unregulated voltage supply via a voltage follower MOS transistor, whose gate terminal is driven by a supply-insensitive voltage source coming from the internal biasing configuration. The additional voltage reference is generated using the type of the biasing current made by the main voltage reference loaded by a transistor. A MOS-only implementation of the proposed reference employs MOS devices instead of passive resistors and linear capacitors. A prototype of the proposed solution consumes 30 ​nA with an area of 0.01 ​mm² in 0.18-μm CMOS process, producing a main voltage reference of 147 ​mV while operating at the supply voltage down to 0.7 ​V. Simulation results demonstrate an average temperature coefficient (TC) of 66.38 ​ppm/^°C for a temperature range of −40 to 120 ​°C. The line sensitivity is about 0.031%/V for the line voltages above 1.3 ​V. The mean power supply rejection ratio (PSRR) is −90 dB and −64.4 ​dB ​at 10 ​Hz and 1 ​MHz, respectively, when the voltage supply is set to 1.8 ​V and an equivalent MOS capacitor of 5 ​pF is used at the output. The 1% start-up settling time is 240 μs for a 1.0 ​V voltage supply step, and can be reduced by increasing the supply voltage magnitude.

提出了一种不使用任何集成电阻器或双极晶体管的纳米功率全MOS电压基准电路，以廉价的数字CMOS技术产生多个电压源。该设计基于仅由标准nMOS晶体管制成的电流驱动电压基准内核，并且可以通过灵活的偏置电流加电，而无需考虑其温度特性。敏感芯通过电压跟随器MOS晶体管与不受调节的电压源隔离开，该跟随器MOS晶体管的栅极端由来自内部偏置配置的对电源不敏感的电压源驱动。使用由晶体管加载的主参考电压产生的偏置电流类型生成附加参考电压。所提出的参考文献的仅MOS实施采用MOS器件代替无源电阻器和线性电容器。拟议解决方案的原型消耗30 nA的面积为0.01毫米采用0.18-μmCMOS工艺的²个器件，在低至0.7V的电源电压下工作时产生147mV的主电压基准。仿真结果表明66.38 PPM /的平均温度系数（TC）^°下的温度范围为-40至120℃。对于高于1.3 V的线路电压，线路灵敏度约为0.031％/ V。当电源电压设置为1.8 V且等效MOS电容为5 pF时，在10 Hz和1 MHz时，平均电源抑制比（PSRR）分别为−90 dB和−64.4 dB用于输出。对于1.0V的电压供电步骤，1％的启动建立时间为240μs，可以通过增加电源电压幅度来减少。