In Space applications, the scaling of transistors has made integrated circuits (ICs) more susceptible to soft errors, caused by radiation strikes. When a soft error causes a bit flip in a memory device, this event is referred to as a Single Event Upset (SEU). Since SEU errors degrade system performance and eventually lead to system failure, the design of radiation-resilient memory is substantial. This paper presents a radiation resilient SRAM with a self-refresh scheme for lowering the number of errors in each row below a threshold number. The proposed self-refresh operation reads out the stored data and performs single error correction using a simple algorithm during its hold/idle mode. A 4KB SRAM test chip in 65nm CMOS technology demonstrates a significant reduction in errors with the self-refresh operation. When the SRAM test chip was exposed to accelerated proton radiation with an energy level of 39.38 MeV, the self-refresh scheme reduces the number of uncorrectable errors by $25\times $ and $8\times $ lesser for the fluence of $9.82\times 10^{11}$ particles/cm² and $49.1\times 10^{11}$ particles/cm², respectively.

中文翻译：

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通过自刷新操作和纠错实现 SRAM 辐射加固

在太空应用中，晶体管的缩放使集成电路 (IC) 更容易受到由辐射冲击引起的软错误的影响。当软错误导致存储设备中的位翻转时，此事件称为单事件翻转 (SEU)。由于 SEU 错误会降低系统性能并最终导致系统故障，因此抗辐射存储器的设计非常重要。本文提出了一种具有自刷新方案的辐射弹性 SRAM，用于将每行中的错误数量降低到阈值以下。建议的自刷新操作读取存储的数据并在其保持/空闲模式期间使用简单的算法执行单个错误纠正。采用 65 纳米 CMOS 技术的 4KB SRAM 测试芯片表明，自刷新操作显着减少了错误。 $25\times $ 和 $8\times $ 影响较小 $9.82\乘以 10^{11}$ 颗粒/cm ²和 $49.1\乘以 10^{11}$ 颗粒/cm ²，分别。