Abstract

Ultra-thin wafer fabrication has become a hot spot in recent years with the growing demand for small size and high performance electronic devices. However, far less research focused on the damage behavior in ultra-thin wafer. In this work, 300 mm diameter silicon wafer was thinned to 6 µm thick by grinding plus ultra-precision dry polishing. The damage behavior before and after the dry polishing was discussed. Mechanical and surface analysis showed that the dry polishing process can help improve the strength and surface uniformity of ultra-thin wafer by removing high pressure phase and micro cracks. Series of nano beam diffraction patterns revealed the stress induced by the thinning process only existed in surface. High resolution transmission electron microscopy images analyzed by geometric phase approach indicated that surface dislocations can move across the wafer and reached bottom device layers during the dry polishing, increasing the risk of electrical deterioration. The findings are of great significance to the study on process optimization of ultra-thin wafer and provide insights into the reliability of advanced electronic packaging.

Graphic abstract

中文翻译：

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干抛光引起的超薄单晶硅晶圆的亚表面损伤

摘要

近年来，随着对小尺寸和高性能电子设备的需求不断增长，超薄晶圆制造已成为热点。但是，很少有研究关注超薄晶圆的损伤行为。在这项工作中，通过研磨和超精密干法抛光将直径300 mm的硅晶片减薄到6 µm厚。讨论了干抛光前后的损伤行为。机械和表面分析表明，干法抛光工艺可以消除高压相和微裂纹，从而有助于提高超薄晶片的强度和表面均匀性。一系列的纳米束衍射图表明，由稀化过程引起的应力仅存在于表面。通过几何相方法分析的高分辨率透射电子显微镜图像表明，在干法抛光过程中，表面位错可在整个晶圆上移动并到达底部器件层，从而增加了电劣化的风险。这些发现对超薄晶圆工艺优化研究具有重要意义，并为深入了解先进电子封装的可靠性提供了见识。

图形摘要