The device scaling restricted due to the limitation of the subthreshold swing of the MOS transistor, which is not less than 60 mV/dec. The researchers are concentrating more on power efficient techniques for advanced, more featured, electronic systems. In place of MOS transistor, which is homojunction, if a heterojunction transistor with low bandgap materials used, the subthreshold swing of the transistor being reduce to below 60 mV/decade and low leakage current can obtain. Ge, GeSi, etc. materials are used in the design and implementation Heterojunction Tunneling Transistor (HETT) due to low band gap.

In this work, both types of HETTs such as NHETT and PHETT designed and implemented using low bandgap materials with a technique of increasing tunneling area by overlapping. The performance of NHETT and PHETT described by the design and implementation of 7T MOSFET SRAM. The power and delay analysis of this SRAM cell using HETTs presented, and the results compared with MOSFET based standard 6T, conventional 7T SRAM cells.

由于MOS晶体管的亚阈值摆幅的限制，器件缩放受到限制，该阈值摆幅不小于60 mV / dec。研究人员将更多精力放在先进的，功能更强大的电子系统的节能技术上​​。如果使用具有低带隙材料的异质结晶体管代替同质结的MOS晶体管，则该晶体管的亚阈值摆幅可减小至60 mV /十倍以下，并且可以获得低泄漏电流。由于带隙低，因此在设计和实现异质结隧穿晶体管（HETT）中使用了Ge，GeSi等材料。

在这项工作中，两种类型的HETT（例如NHETT和PHETT）都是使用低带隙材料设计和实现的，其技术是通过重叠增加隧道面积。NHETT和PHETT的性能由7T MOSFET SRAM的设计和实现来描述。给出了使用HETT对该SRAM单元进行的功率和延迟分析，并将结果与​​基于MOSFET的标准6T，常规7T SRAM单元进行了比较。