In this paper, a compact 2D analytical modelling of surface potential and simulation of Si-Ge hetero-junction Dual Material Gate Vertical t-shape T-FET is presented. In the proposed model, device is divided into two gate-metal work function named as tunneling gate and auxiliary gate. Both the biasing voltage of source and drain will have controlled effect on the device’s surface potential which are used to access the depletion length of the tunneling junction. Therefore, the tunneling current will use the surface potential model as basic principle to drive the current model of the device. For solving the 2D Poisson equation with the necessary boundary conditions, parabolic approximation methods are employed. We test the reliability of surface potential on different parameters profile by varying it as a function of Si-Ge material mole-fraction, gate-source voltage, drain-source voltage, gate-oxide thickness, high k dielectric constant and different gate work function and various compound material used. Finally, we come out with the expression of the channel surface potential that will change in accordance with the drain and gate biasing voltage. The validity of the projected model has been confirm by showing agreement between the analytical findings and TCAD simulation results.

本文提出了一种紧凑的表面电势二维分析模型，以及Si-Ge异质结双材料栅垂直t型T-FET的仿真。在所提出的模型中，器件分为两个栅极金属功函数，分别称为隧道栅极和辅助栅极。源极和漏极的偏置电压都将对器件的表面电势产生受控影响，该表面电势用于访问隧道结的耗尽长度。因此，隧穿电流将使用表面电势模型作为基本原理来驱动器件的电流模型。为了用必要的边界条件求解二维泊松方程，采用抛物线近似方法。我们通过根据Si-Ge材料摩尔分数的变化来改变表面电势在不同参数轮廓上的可靠性，栅极-源极电压，漏极-源极电压，栅极氧化物厚度，高k介电常数和不同的栅极功函数以及所使用的各种复合材料。最后，我们得出了沟道表面电势的表达式，该表达式将根据漏极和栅极偏置电压而变化。通过显示分析结果与TCAD仿真结果之间的一致性，可以验证所投影模型的有效性。