Resistive nonvolatile memories (NVMs) promise significant performance improvement over existing NVM candidates. However, fabrication nonidealities and parasitics on the access path cause cell location-dependent variations in the total resistance received at the read circuitry. Write characteristics delivered to each cell, as well as the optimal write conditions for each cell, are also location-dependent. In this article, we propose a 2-D calibration scheme to address these variations. The proposed scheme joins row and column calibrations to create a correction grid at each crosspoint on the array and effectively cancels many spatial patterns. The enabling circuit and algorithmic modifications are described. We assess the 2-D calibration scheme in a 28-nm $256\times 256$ memory array, and show reduction in variability across multiple gradient patterns compared to conventional calibration methods. For the same calibration granularity, 2-D calibration achieves between 41% and 99% improvement depending on the amount of calibration bits. For the same amount of total calibration bits, the 2-D calibration scheme reduces the variability between 39% and 99%.

中文翻译：

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电阻式非易失性存储器的二维校准方案

电阻式非易失性存储器 (NVM) 有望比现有的 NVM 候选产品显着提高性能。然而，访问路径上的制造不理想和寄生效应会导致读取电路接收到的总电阻发生与单元位置相关的变化。传递给每个单元的写入特性以及每个单元的最佳写入条件也取决于位置。在本文中，我们提出了一种二维校准方案来解决这些变化。提议的方案结合行和列校准以在阵列上的每个交叉点创建校正网格并有效地消除许多空间模式。描述了使能电路和算法修改。我们在 28 纳米 256 美元\乘以 256 美元存储器阵列中评估二维校准方案，并显示与传统校准方法相比，多个梯度模式的变异性降低。对于相同的校准粒度，二维校准可实现 41% 至 99% 的改进，具体取决于校准位数。对于相同数量的总校准位，二维校准方案将可变性降低了 39% 到 99%。