The Last Level Cache (LLC) plays a key role in the system performance of current multi-cores by reducing the number of long latency main memory accesses. The inter-application interference at this shared resource, however, can lead the system to undesired situations regarding performance and fairness. Recent approaches have successfully addressed fairness and turnaround time (TT) in commercial processors. Nevertheless, these approaches must face sustaining system performance, which is challenging. This work makes two main contributions. LLC behaviors regarding cache performance, data reuse and cache occupancy, that adversely impact on the final performance are identified. Second, based on these behaviors, we propose the Critical-Phase Aware Partitioning Approach (CPA), which reduces TT while sustaining (and even improving) IPC by making an effective use of the LLC space. Experimental results show that CPA outperforms CA, Dunn and KPart state-of-the-art approaches, and improves TT (over 40 percent in some workloads) over Linux default behavior while sustaining or even improving IPC by more than 3 percent in several mixes.

中文翻译：

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以周转时间和系统性能为目标的相位感知缓存分区

最后一级缓存 (LLC) 通过减少长延迟主存储器访问的数量，在当前多核的系统性能中发挥着关键作用。然而，在这个共享资源上的应用间干扰可能导致系统在性能和公平性方面出现不希望的情况。最近的方法已经成功地解决了商业处理器中的公平性和周转时间 (TT)。然而，这些方法必须面临维持系统性能的问题，这是具有挑战性的。这项工作有两个主要贡献。确定了对最终性能产生不利影响的关于缓存性能、数据重用和缓存占用的 LLC 行为。其次，基于这些行为，我们提出了关键阶段感知分区方法（CPA），它通过有效利用 LLC 空间来减少 TT，同时维持（甚至改进）IPC。实验结果表明，CPA 优于 CA、Dunn 和 KPart 最先进的方法，并且比 Linux 默认行为提高了 TT（在某些工作负载中超过 40%），同时在几种混合中保持甚至提高了超过 3% 的 IPC。