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Power-efficient implementation of pseudo-random number generator using quantum dot cellular automata-based D Flip Flop
Computers & Electrical Engineering ( IF 4.0 ) Pub Date : 2020-07-01 , DOI: 10.1016/j.compeleceng.2020.106658
S. Senthilnathan , S. Kumaravel

Abstract In secured communication, pseudo-random number generators (PRNGs) are widely used to generate random sequences. This paper presents a novel D flip flop and standard EX-NOR gate to realize a Quantum dot Cellular Automata (QCA) based PRNG. For the purpose of comparison, QCA based PRNG is implemented with existing D flip flops. The proposed D flip flop comprises a cell count of 24 with area of 0.02 µm2 and delay of 0.05 ps, total power dissipation for D flip flop is 40.30 meV, 49.76 meV and 61.90 meV for different tunneling energy level of 0.5 Ek, 1.0 Ek and 1.5 Ek, respectively at temperature of 2 Kelvin. The implemented PRNG configurations are simulated using QCA Designer tool for area and delay. Power dissipation of D flip flop is analyzed using QCA Pro simulator tool. From the simulated results, it may be noted that PRNG with novel D flip flop realization achieves low power, low area and less delay compared to other PRNG realization.

中文翻译:

使用基于量子点元胞自动机的 D 触发器的伪随机数发生器的节能实现

摘要 在安全通信中,伪随机数发生器(PRNG)被广泛用于生成随机序列。本文提出了一种新颖的 D 触发器和标准的 EX-NOR 门来实现基于量子点元胞自动机 (QCA) 的 PRNG。为了比较,基于 QCA 的 PRNG 是用现有的 D 触发器实现的。所提出的 D 触发器包括 24 个单元,面积为 0.02 µm2,延迟为 0.05 ps,D 触发器的总功耗为 40.30 meV、49.76 meV 和 61.90 meV,不同隧道能级为 0.5 Ek、1.0 Ek 和1.5 Ek,分别在 2 开尔文的温度下。实现的 PRNG 配置使用 QCA Designer 工具模拟面积和延迟。使用 QCA Pro 模拟器工具分析 D 触发器的功耗。从模拟结果来看,
更新日期:2020-07-01
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