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A tunable low noise high PSRR high accuracy bandgap reference using stacked-long cascode technique in 14 nm FinFET process
Microelectronics Journal ( IF 1.9 ) Pub Date : 2020-05-30 , DOI: 10.1016/j.mejo.2020.104825 Qiuliang Li , Lei Wu , Ran Liu , Yi Liu
中文翻译:
在14 nm FinFET工艺中使用堆叠长共源共栅技术的可调低噪声高PSRR高精度带隙基准
更新日期:2020-05-30
Microelectronics Journal ( IF 1.9 ) Pub Date : 2020-05-30 , DOI: 10.1016/j.mejo.2020.104825 Qiuliang Li , Lei Wu , Ran Liu , Yi Liu
A tunable CMOS bandgap reference circuit is presented. To improve the match performance of the current mirror, the proposed bandgap is realized with stacked-long Cascode technique. A detailed analysis of various error sources is provided and the techniques to reduce them are discussed. The bandgap reference with an accuracy of ±1.2% from −40 °C to 125 °C draws 57μA from a 1.8 V supply, and occupied 0.0036 mm2 in a 14 nm FinFET Process. The output noise is 0.76μV (rms) and the PSRR is −115dB@DC.
中文翻译:
在14 nm FinFET工艺中使用堆叠长共源共栅技术的可调低噪声高PSRR高精度带隙基准
提出了一种可调CMOS带隙基准电路。为了提高电流镜的匹配性能,提出的带隙采用堆叠长的Cascode技术实现。提供了各种错误源的详细分析,并讨论了减少错误源的技术。带隙基准在−40°C至125°C范围内的精度为±1.2%,从1.8 V电源汲取57μA电流,并在14 nm FinFET工艺中占据0.0036 mm 2的空间。输出噪声为0.76μV(rms),PSRR为−115dB @ DC。