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Parametric study of pulsed laser deposited (PLD) WSe2 2D transistors
Microelectronic Engineering ( IF 2.6 ) Pub Date : 2020-06-01 , DOI: 10.1016/j.mee.2020.111368
S.C. Mbisike , S. Seo , S. Lee , J. Phair , R. Cheung

Abstract A fabrication process for making large area transistors on pulsed laser deposited (PLD) WSe2 has been developed. Large films of WSe2 have been deposited via PLD technique on SiO2/Si substrate. Employing a mask-less lithography technique and using vapour XeF2 as an etchant, transistors of lengths (17, 83, 323 and 1000 μm) and widths (14 and 850 μm) have been fabricated. Electrical characterization of the transistors show that as the channel length (L) decreases, the magnitude of the drain-source current increases. In addition, the current across the transistor has been found to increase by increasing the channel width (W). Moreover, channels with large areas have been found to deliver substantially more drain-source current compared with smaller channel areas with similar W/L. A W/L ratio of 0.85 has been found to possess the highest drain current across the transistors fabricated. From the transfer length measurement (TLM), the sheet resistance and contact resistance of the device have been measured. Field effect mobility of the transistors have been calculated. Raman spectrum shows that PLD WSe2 possess similar quality as exfoliated WSe2. However, Photoluminescence (PL) spectrum and TLM results suggest the lack of bandgap in our 14-layer PLD WSe2.

中文翻译:

脉冲激光沉积 (PLD) WSe2 2D 晶体管的参数研究

摘要 开发了一种在脉冲激光沉积 (PLD) WSe2 上制造大面积晶体管的制造工艺。WSe2 的大薄膜已经通过 PLD 技术沉积在 SiO2/Si 衬底上。采用无掩模光刻技术并使用蒸气 XeF2 作为蚀刻剂,已经制造出长度(17、83、323 和 1000 微米)和宽度(14 和 850 微米)的晶体管。晶体管的电气特性表明,随着沟道长度 (L) 的减小,漏源电流的幅度增加。此外,已经发现通过增加沟道宽度 (W) 来增加晶体管上的电流。此外,与具有类似 W/L 的较小沟道面积相比,已发现具有大面积的沟道可提供更多的漏源电流。AW/L 比率为 0。已发现 85 具有跨制造的晶体管的最高漏极电流。通过传输长度测量 (TLM),测量了器件的薄层电阻和接触电阻。已计算晶体管的场效应迁移率。拉曼光谱表明 PLD WSe2 具有与剥落的 WSe2 相似的质量。然而,光致发光 (PL) 光谱和 TLM 结果表明我们的 14 层 PLD WSe2 缺乏带隙。
更新日期:2020-06-01
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