This paper presents the design and implementation of time–to-digital Converter (TDC) with a low-cost, wide dynamic range, with a measurement precision of a few picoseconds. Because of these requirements, the focus of this work is mainly on TDC architectures based on the Nutt interpolation method, which has several advantages when a long measurement range is needed. This technique consists of coarse measurement using a phase-locked loop clock and a fine measurement using two ring oscillators having a slightly different frequency. Best Place and Route delay and loading oscillators with buffers loads are done to get high resolution. To prove the functionality, the new TDC design is implemented at a low cost, low power Xilinx Virtex-5 with device xc5vfx70t-1ff11360f ML507 field-programmable gate array (FPGA). The presented new approach achieved high-resolution TDC of 14ps and a wide dynamic range limited by the 10-bit counter.

本文介绍了一种低成本，宽动态范围，测量精度为几皮秒的时间数字转换器（TDC）的设计和实现。由于这些要求，这项工作的重点主要放在基于Nutt插值方法的TDC架构上，当需要较长的测量范围时，它具有多个优点。该技术包括使用锁相环时钟的粗略测量和使用两个频率稍有不同的环形振荡器的精细测量。最佳布局布线延迟和具有缓冲器负载的加载振荡器已完成以获得高分辨率。为了证明其功能，新的TDC设计以低成本，低功耗的Xilinx Virtex-5和器件xc5vfx70t-1ff11360f ML507现场可编程门阵列（FPGA）实现。