Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems,arXiv - CS - Hardware Architecture

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Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems
arXiv - CS - Hardware Architecture Pub Date : 2020-05-21 , DOI: arxiv-2005.10864
Michael Bechtel and Heechul Yun

In this paper, we identify that memory performance plays a crucial role in the feasibility and effectiveness for performing denial-of-service attacks on shared cache. Based on this insight, we introduce new cache DoS attacks, which can be mounted from the user-space and can cause extreme WCET impacts to cross-core victims---even if the shared cache is partitioned---by taking advantage of the platform's memory address mapping information and HugePage support. We deploy these enhanced attacks on two popular embedded out-of-order multicore platforms using both synthetic and real-world benchmarks. The proposed DoS attacks achieve up to 75X WCET increases on the tested platforms.

更新日期：2020-05-25

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