The iMemComp is a family of logic gates based on RRAM devices. It has potential advantage on the design of high-performance logic circuits, since the NAND, AND, NOT and transmission iMemComp gates only consume single cycle, respectively. However, the synthesis method of logic circuits based on the iMemComp gates has not been systematically studied before. This work proposes the synthesis method of the row-oriented logic circuits based on the multi-input single-cycle iMemComp gates. The synthesis results show that the circuits generated from the proposed method outperform most of those RRAM based counterparts generated from the previous methods. Furthermore, the synthesis method of the array-oriented iMemComp logic circuits is proposed. The proposed array-oriented method generates the relatively high-performance logic circuits since both the row-based and the column-based single-cycle iMemComp gates are applied, and the generated circuits are relatively area-efficient because the intra-row and inter-row redundancies are utilized in the circuit mapping.

iMemComp是基于RRAM器件的一系列逻辑门。由于NAND，AND，NOT和传输iMemComp门分别仅消耗单个周期，因此它在高性能逻辑电路的设计上具有潜在的优势。然而，基于iMemComp门的逻辑电路的合成方法尚未得到系统的研究。本文提出了一种基于多输入单周期iMemComp门的行逻辑电路的综合方法。综合结果表明，所提出的方法所产生的电路性能优于先前方法所产生的大多数基于RRAM的电路。此外，提出了面向阵列的iMemComp逻辑电路的综合方法。