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A 0.2 pJ/step open loop VCO-based ADC with inverse R–2R preweighted linearization
Analog Integrated Circuits and Signal Processing ( IF 1.2 ) Pub Date : 2020-05-23 , DOI: 10.1007/s10470-020-01663-4
Karama M. AL-Tamimi , Kamal El-Sankary

An open loop analog-to-digital converter based on ring voltage-controlled oscillator (VCO-based ADC) is presented. By introducing the inverse R–2R pre-weighted front-end technique, the nonlinearities of the voltage to frequency conversion of the proposed VCO is kept less than 1% over rail-to-rail input swing. Unlike prior approaches, this proposed method does not suffer from any stability issues or feedback imperfections. A prototype was fabricated using TSMC 65 nm process. It occupies an actives area of 0.03 mm2 and consumes as little as 3.1 mA from 1 V power supply. Measurement results of linearity indicate SFDR and SNDR of 77 and 66.7 dB, respectively, over 5 MHz passband bandwidth. This reveals energy less than 0.2 pJ/step.



中文翻译:

具有反向R–2R预加权线性化的0.2 pJ /步,基于开环VCO的ADC

提出了一种基于环形压控振荡器的开环模数转换器(基于VCO的ADC)。通过引入反向R–2R预加权前端技术,在轨到轨输入摆幅范围内,拟议VCO的电压至频率转换的非线性度保持小于1%。与现有方法不同,该提出的方法没有任何稳定性问题或反馈缺陷。使用TSMC 65 nm工艺制造了原型。它的有效面积为0.03 mm 2,从1 V电源消耗的电流仅为3.1 mA。线性度的测量结果表明,在5 MHz通带带宽上,SFDR和SNDR分别为77和66.7 dB。这表明能量低于0.2 pJ /步。

更新日期:2020-05-23
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