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Energy Efficiency of MULTIPLE-INPUT, MULTIPLE-OUTPUT Architectures : Future 60-GHz Applications
IEEE Vehicular Technology Magazine ( IF 5.8 ) Pub Date : 2020-06-01 , DOI: 10.1109/mvt.2020.2979719
Steve Blandino , Claude Desset , Andre Bourdoux , Sofie Pollin

Large antenna systems at millimeter-wave (mmwave) can concentrate the transmit power and the receive region over narrow beams, as well as enable spatial multiplexing. Thanks to these benefits, large antenna systems at mm-wave are the core technologies for future wireless local area network (WLAN) and 5G/ beyond 5G (B5G) cellular standards. Energy efficiency is a crucial design objective for new technologies to reduce operating costs, minimize the environmental impact, and enable battery-powered applications. Power consumption and system performance depend on the design of the beamforming architecture. The objective of this article is to compare the energy efficiency of three different architectures using power consumption measurements of a 60-GHz CMOS transceiver. We compare a full digital architecture, in which each digital chain is connected to a single antenna, against hybrid partially connected (HPC) and hybrid fully connected (HFC) architectures, using fewer digital chains than antennas. The system throughput performance is evaluated considering the hardware nonidealities, including power amplifier saturation, quantization, and phase noise (PN). We show that the number of users spatially multiplexed impacts the hybrid beamforming tradeoff. When few users are multiplexed, the main drain of energy is the digital front end, as it needs to execute operations such as filtering and fast Fourier transform (FFT) on a wide modulation bandwidth of 1.76 GHz. In this case, reducing digital redundancy using a hybrid architecture is beneficial, and a HPC architecture is the most attractive. Scaling the system to a massive multiple-input, multiple-output (mMIMO) scenario instead allows full digital architectures to achieve the highest energy efficiency.

中文翻译:

多输入、多输出架构的能效:未来的 60-GHz 应用

毫米波 (mmwave) 的大型天线系统可以将发射功率和接收区域集中在窄波束上,并实现空间复用。由于这些优势,毫米波大型天线系统是未来无线局域网 (WLAN) 和 5G/5G (B5G) 蜂窝标准的核心技术。能源效率是新技术的关键设计目标,可降低运营成本、最大程度地减少对环境的影响并实现电池供电的应用。功耗和系统性能取决于波束成形架构的设计。本文的目的是使用 60 GHz CMOS 收发器的功耗测量来比较三种不同架构的能效。我们比较了一个全数字架构,其中每个数字链都连接到单个天线,与混合部分连接 (HPC) 和混合完全连接 (HFC) 架构相比,使用的数字链比天线少。系统吞吐量性能的评估考虑了硬件非理想性,包括功率放大器饱和度、量化和相位噪声 (PN)。我们表明,空间复用的用户数量会影响混合波束成形权衡。当很少用户被复用时,能量的主要消耗是数字前端,因为它需要在 1.76 GHz 的宽调制带宽上执行滤波和快速傅里叶变换 (FFT) 等操作。在这种情况下,使用混合架构减少数字冗余是有益的,而 HPC 架构是最有吸引力的。将系统扩展到大规模的多输入,
更新日期:2020-06-01
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