In embedded graphics systems, the graphics processing unit (GPU) also consumes significant amount of frame buffer memory bandwidth. Frame buffer compression is widely adopted to alleviate both memory bandwidth and power consumption issues for the display controller, but rarely has it been applied to addressing GPU’s consumption. This paper proposes a real-time fixed-ratio frame buffer compression technique for RISC-V processor-based embedded graphics systems. The advantage of the proposed method is that the fixed-ratio compressed frame buffer can be directly adopted as an input texture by GPU. The proposed architecture (called an FBC coprocessor) is a hardware extension to the RISC-V microprocessor that supports frame buffer memory bandwidth reduction. The results show that the coprocessor consumes only 1% additional silicon space of the whole system, while reducing bandwidth consumption by 72.64%. A prototype system-on-a-chip indicates that the proposed FBC coprocessor can reduce GPU power consumption by up to 12.7% for an example automotive application.

在嵌入式图形系统中，图形处理单元（GPU）还消耗大量的帧缓冲内存带宽。帧缓冲区压缩被广泛采用以减轻显示控制器的内存带宽和功耗问题，但很少用于解决GPU的功耗。本文提出了一种用于基于RISC-V处理器的嵌入式图形系统的实时固定比率帧缓冲区压缩技术。所提出的方法的优点在于，固定比率压缩帧缓冲器可以被GPU直接用作输入纹理。提议的体系结构（称为FBC协处理器）是RISC-V微处理器的硬件扩展，它支持减少帧缓冲存储器带宽。结果表明，协处理器仅消耗整个系统1％的额外硅空间，而带宽消耗却减少了72.64％。原型片上系统表明，针对示例汽车应用，所提出的FBC协处理器可以将GPU功耗降低多达12.7％。