We present the experimental results on the impact of transistor width modulation and power supply voltage variation on the $\alpha $ -soft error rate (SER) in a 65-nm CMOS 6T static random access memory (SRAM) obtained from an accelerated test experiment using an Am- $241~\alpha $ -source. Five 6T cells with various combinations of transistor widths were tested and the results show that nMOS and pMOS widths play a different role on SER. We also found that the transistor width modulation effectiveness is highly dependent on the power supply voltage. In particular, the results show that at around nominal voltages, widening all pMOS while keeping all nMOS minimum sized, is the best way to improve SER. However, at lower voltages the results become completely different, and the best option for an overall SER improvement is to keep all transistors minimum sized.

中文翻译：

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晶体管宽度对 CMOS 6T SRAM 中 alpha-SER 电源电压依赖性的影响

我们展示了晶体管宽度调制和电源电压变化对 $\alpha $ - 65-nm CMOS 6T 静态随机存取存储器 (SRAM) 中的软错误率 (SER) 从使用 Am 的加速测试实验中获得- $241~\alpha $ -来源。测试了五个具有各种晶体管宽度组合的 6T 单元，结果表明 nMOS 和 pMOS 宽度对 SER 发挥不同的作用。我们还发现晶体管宽度调制的有效性高度依赖于电源电压。特别是，结果表明，在标称电压附近，加宽所有 pMOS，同时保持所有 nMOS 最小尺寸，是改善 SER 的最佳方法。然而，在较低电压下，结果变得完全不同，整体 SER 改进的最佳选择是保持所有晶体管的最小尺寸。