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Optimized DL-TFET Design for Enhancing its Performance Parameters by Using Different Engineering Methods
IETE Technical Review ( IF 2.5 ) Pub Date : 2020-05-18 , DOI: 10.1080/02564602.2020.1758226
Monika Sharma 1 , Rakhi Narang 2 , Manoj Saxena 3 , Mridula Gupta 1
Affiliation  

ABSTRACT

Dopingless Tunnel Field Effect Transistor is a prominent device because of its low sub-threshold swing and fast switching speed. In this paper, DL-TFET is investigated for enhancing the performance parameters by applying different engineering techniques. The hetero-junction is implemented in the DL-TFET for increasing the ION current. Further, for reducing the ambipolar current and enhancing the ON-characteristics by introducing the non-uniform oxide layer, hetero-gate and then further optimization is done by varying the “x” compositions of In1-xGaxAs for source side material. The various staggered hetero-gate hetero-junction DL-TFET structures with different EBeff are comparatively investigated for analyzing their performance parameters. Among them, highly staggered Hetero-junction DL-TFET with EBeff = 0.374 eV shows better performance as lower threshold voltage, higher ION current, high transconductance and lower sub-threshold swing. So, the In0.45Ga0.55As/In0.25Ga0.75As based hetero-gate at TG = 4.2 eV and Θ = 7.59° heterojunction DL-TFET structure can be chosen for fast switching and advanced circuit application.



中文翻译:

通过使用不同的工程方法优化 DL-TFET 设计以提高其性能参数

摘要

无掺杂隧道场效应晶体管因其亚阈值摆幅低和开关速度快而成为一种突出的器件。在本文中,研究了 DL-TFET 通过应用不同的工程技术来提高性能参数。在 DL-TFET 中实施异质结以增加 I ON电流。此外,为了通过引入非均匀氧化层、异质栅极来降低双极电流并增强导通特性,然后通过改变源侧材料In 1-x Ga x As的“x”组成来进行进一步优化. 具有不同 E Beff的各种交错异质栅极异质结 DL-TFET 结构进行了比较研究以分析它们的性能参数。其中,E Beff  = 0.374 eV 的高度交错异质结 DL-TFET表现出更好的性能,因为更低的阈值电压、更高的 I ON电流、高跨导和更低的亚阈值摆幅。因此,可以选择 TG = 4.2 eV 和 Θ = 7.59° 异质结 DL-TFET 结构的基于In 0.45 Ga 0.55 As/In 0.25 Ga 0.75 As 的异质栅极用于快速开关和高级电路应用。

更新日期:2020-05-18
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