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Fabrication of silicon-on-insulator with high uniform top Si for silicon photonics applications
Materials Science in Semiconductor Processing ( IF 4.2 ) Pub Date : 2020-10-01 , DOI: 10.1016/j.mssp.2020.105159
Nan Gao , Meng Chen , Hongtao Xu , Zhongying Xue , Nan Zhang , Lu Fei , Xing Wei

Abstract Silicon-on-insulator (SOI) is the most suitable platform for silicon photonics applications owing to its unique structure and excellent compatibility. To satisfy the requirement of uniformity, HCl etching process is developed to smooth the surface of top silicon layer in this paper. The top silicon mean thickness is thinned down to 220 nm; the corresponding root mean square roughness is as low as 0.165 nm after the etching process, which is comparable to chemical mechanical polishing (CMP) process. Furthermore, HCl etching process shows great repeatability of thickness range and removal amount. The within wafer thickness range can be controlled below 30 A and the removal amount can be controlled within ±4.5 A, which is far better than conventional CMP process.

中文翻译:

用于硅光子学应用的具有高均匀顶部硅的绝缘体上硅的制造

摘要 绝缘体上硅(SOI)由于其独特的结构和良好的兼容性,是最适合硅光子学应用的平台。为了满足均匀性的要求,本文开发了HCl蚀刻工艺来平滑顶部硅层的表面。顶部硅平均厚度减薄至 220 nm;蚀刻工艺后对应的均方根粗糙度低至0.165 nm,可与化学机械抛光(CMP)工艺相媲美。此外,HCl 蚀刻工艺在厚度范围和去除量方面表现出极大的可重复性。晶圆厚度范围内可控制在30 A以下,去除量可控制在±4.5 A以内,远优于传统CMP工艺。
更新日期:2020-10-01
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