We present a detailed study on the n-channel single-gate junctionless transistor (JLT) at the \({10}-\hbox{nm}\) node. We investigate the influence of its structural parameters on the on-state current and the off-state leakage current. Furthermore, we show that the use of high-k spacers may not be advantageous in future nanoscale junctionless transistors and confirm this argument by simulation. We also present the results of our investigation on process variations, including the sensitivity of the JLT to random dopant fluctuations as well as the gate work function using Monte Carlo simulations. These results are then compared with those of a conventional FinFET. Finally, we provide design guidelines for JLTs at \({10}-\hbox{nm}\) gate length.

中文翻译：

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栅极长度为10 nm的单栅极SOI纳米片无结晶体管：设计指南并与常规SOI FinFET进行比较

我们在\（{10}-\ hbox {nm} \）节点上对n沟道单栅极无结晶体管（JLT）进行了详细研究。我们研究了其结构参数对通态电流和关态泄漏电流的影响。此外，我们表明在未来的纳米级无结晶体管中使用高k间隔物可能没有优势，并通过仿真证实了这一观点。我们还介绍了我们对工艺变化的调查结果，包括JLT对随机掺杂物波动的敏感性以及使用蒙特卡洛模拟的栅极功函数。然后将这些结果与常规FinFET的结果进行比较。最后，我们在\（{10}-\ hbox {nm} \）提供JLT的设计准则 门的长度。