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An Efficient Architecture for QRS Detection in FPGA Using Integer Haar Wavelet Transform
Circuits, Systems, and Signal Processing ( IF 1.8 ) Pub Date : 2020-01-21 , DOI: 10.1007/s00034-019-01328-2
Soham Talukder , Rajan Singh , Satyajit Bora , Roy Paily

In the past years, several QRS complex (Q, R and S wave) detecting algorithms have been implemented in software, but they are not applicable for real-time operation due to their mathematical complexity. Hence, this paper focuses on developing an algorithm which enables detection of QRS complex in real time. Here, Integer Haar Wavelet Transform is employed which is used for the purpose of filtering ECG signal and detecting the R-peak frequency of QRS complex. Various blocks of the proposed architecture are implemented in a Digilent Nexys 4 double data rate field-programmable gate array board with only 501 flip-flops and 557 look-up tables utilized which makes it suitable for directly installing it into medical equipment or further developing a smart internet of things system for bio-medical applications. To make the designed system more generic, several similar blocks or components have been used. At first, the principle of using wavelet to detect QRS complex is explored theoretically and accordingly used for developing our system. An efficient hardware architecture is implemented incorporating many simplifications, a significant one being approximation of floating point arithmetic to integer arithmetic, required for wavelets. The architecture of the designed system is represented with demonstration in behavioral simulation as well as hardware testing. In the end, the system is analyzed and results are obtained with an error percentage in RR interval computation of less than 1.4% and QRS detection accuracy of 98.76%. The proposed architecture is also synthesized using 130 nm technology which produces 0.717% of leakage power. The developed architecture can be used for analysis of other bio-medical signals where the operation of wavelet transform in hardware is required.

中文翻译:

使用整数 Haar 小波变换在 FPGA 中进行 QRS 检测的有效架构

在过去的几年中,已经在软件中实现了几种 QRS 复合波(Q、R 和 S 波)检测算法,但由于其数学复杂性,它们并不适用于实时操作。因此,本文的重点是开发一种能够实时检测 QRS 复合波的算法。这里采用整数哈尔小波变换,用于过滤ECG信号和检测QRS复合波的R峰值频率。在 Digilent Nexys 4 双倍数据速率现场可编程门阵列板中实现了所提议架构的各种模块,仅使用了 501 个触发器和 557 个查找表,这使其适合直接安装到医疗设备中或进一步开发用于生物医学应用的智能物联网系统。为了使设计的系统更通用,已经使用了几个类似的块或组件。首先,从理论上探讨了使用小波检测QRS复合波的原理,并相应地用于开发我们的系统。实现了一种高效的硬件架构,其中包含许多简化,其中一个重要的就是将小波所需的浮点算术近似为整数算术。设计系统的架构通过行为模拟和硬件测试的演示来表示。最后对该系统进行了分析,得到了RR间期计算误差率小于1.4%,QRS检测准确率98.76%的结果。建议的架构也使用 130 nm 技术合成,产生 0.717% 的泄漏功率。
更新日期:2020-01-21
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