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Tutorial on forming through-silicon vias
Journal of Vacuum Science & Technology A ( IF 2.4 ) Pub Date : 2020-04-14 , DOI: 10.1116/6.0000026
Susan L. Burkett 1 , Matthew B. Jordan 2 , Rebecca P. Schmitt 2, 3 , Lyle A. Menk 2, 3 , Andrew E. Hollowell 2
Affiliation  

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.

中文翻译:

形成硅通孔的教程

硅通孔(TSV)是三维集成电路技术的一项关键技术。这些贯穿基板的互连允许电子设备垂直堆叠以用于广泛的应用和性能改进,例如增加带宽,减少信号延迟,改善电源管理和减小尺寸。TSV的成功集成涉及许多相互依赖的处理步骤。本文提供了在以下TSV中通常使用的以下半导体制造工艺步骤的教程风格回顾:对硅的深蚀刻以形成通孔,薄膜沉积以提供绝缘层,势垒层和种子层,电镀铜以形成导电层金属和晶圆变薄以显示TSV。
更新日期:2020-04-14
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