Inter-cell interference (ICI) significantly affects the reliability of flash memory. Both horizontal and vertical ICI have been taken into account for the errors in flash memory. In this paper, we propose a two-dimensional hierarchical constrained code (2D-HCC) to mitigate both horizontal and vertical ICIs of flash memory. The proposed scheme is applied to both single-level cell (SLC) and multi-level cell (MLC) flash memory. Finally, the bit error rate (BER) of the proposed 2D-HCC with/without Bose-Chaudhuri-Hocquenghem (BCH) codes is simulated. The simulated results confirm the advantage of the proposed scheme.

中文翻译：

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使用分层约束代码缓解闪存中的2D-ICI

小区间干扰（ICI）会严重影响闪存的可靠性。闪存中的错误已同时考虑了水平和垂直ICI。在本文中，我们提出了二维分层约束代码（2D-HCC），以减轻闪存的水平和垂直ICI。所提出的方案被应用于单级单元（SLC）和多级单元（MLC）闪存。最后，模拟了所建议的带有/不带有Bose-Chaudhuri-Hocquenghem（BCH）码的2D-HCC的误码率（BER）。仿真结果证实了该方案的优势。