ABSTRACT The progressive shrinking of MOS dimensions confronts critical issues while designing low power consuming computational devices. The Single Electron Technology is one of the emerging technological solutions to cope up with the scaling challenges and support Moore’s law. Apart from the miniaturization, another concern is the energy efficiency of the designed circuit. Use of reversible logic in place of the conventional Boolean logic can serve the purpose. The works so far in this field mainly concentrated upon the application aspect of different reversible gates and reversible circuits rather than proper technological approach or device based design .Different reversible gates such as Fredkin, Toffoli and Double Feynman Gate implementation with Single Electron device and their simulation results are presented in this paper. The power consumption, stability and the size are mainly considered as the different performance metrics. The circuit stability and its temperature dependency is also analysed through the Stability plots generated in SIMON simulator. A new reversible gate PE1 for even parity generating circuits is also proposed along with the supporting simulation results .The design issues and power consumption are compared with the SET-CMOS hybrid-based designs of the same circuits.

中文翻译：

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使用 SE-TLG 方法设计的纳米级可逆逻辑门的性能研究

摘要 在设计低功耗计算设备时，MOS 尺寸的逐渐缩小面临着关键问题。单电子技术是应对缩放挑战和支持摩尔定律的新兴技术解决方案之一。除了小型化之外，另一个问题是设计电路的能效。使用可逆逻辑代替传统的布尔逻辑可以达到目的。迄今为止，该领域的工作主要集中在不同可逆门和可逆电路的应用方面，而不是适当的技术方法或基于器件的设计。不同的可逆门，如 Fredkin、Tofffoli 和双费曼门实现与单电子器件及其仿真结果在本文中给出。功耗、稳定性和大小主要被视为不同的性能指标。还通过 SIMON 模拟器中生成的稳定性图分析了电路稳定性及其温度依赖性。还提出了一种用于偶校验生成电路的新型可逆门PE1以及支持的仿真结果。将设计问题和功耗与相同电路的基于SET-CMOS混合的设计进行了比较。