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Source/Drain Materials for Ge nMOS Devices: Phosphorus Activation in Epitaxial Si, Ge, Ge1-xSnx and SiyGe1-x-ySnx
ECS Journal of Solid State Science and Technology ( IF 1.8 ) Pub Date : 2020-05-06 , DOI: 10.1149/2162-8777/ab8d91
Anurag Vohra 1, 2 , Ilja Makkonen 3 , Geoffrey Pourtois 2, 4 , Jonatan Slotte 5, 6 , Clement Porret 2 , Erik Rosseel 2 , Afrina Khanam 5 , Matteo Tirrito 7 , Bastien Douhard 2 , Roger Loo 2 , Wilfried Vandervorst 1, 3
Affiliation  

This paper benchmarks various epitaxial growth schemes based on n-type group-IV materials as viable source/drain candidates for Ge nMOS devices. Si:P grown at low temperature on Ge, gives an active carrier concentration as high as 3.5 x 1020 cm-3 and a contact resistivity down to 7.5 x10-9 Ω.cm2. However, Si:P growth is highly defective due to large lattice mismatch between Si and Ge. Within the material stacks assessed, one option for Ge nMOS source/drain stressors would be to stack Si:P, deposited at contact level, on top of a selectively grown n-SiyGe1-x-ySnx at source/drain level, in line with the concept of Si passivation of n-Ge surfaces to achieve low contact resistivities as reported in literature [K. Martens et al. Appl. Phys. Lett., 98, 013504 (2011)]. The saturation in active carrier concentration with increasing P (or As)-doping is the major bottleneck in achieving low contact resistivities for as-grown Ge or SiyGe1-x-ySnx. We focus on understanding various dopant deactivation mechanisms in P-doped Ge and Ge1-xSnx alloys. First principles simulation results suggest that P deactivation in Ge and Ge1-xSnx can be explained both by P-clustering and donor-vacancy complexes. Positron annihilation spectroscopy analysis, suggests that dopant deactivation in P-doped Ge and Ge1-xSnx is primarily due to the formation of Pn-V and SnmPn-V clusters.

中文翻译:

Gen nMOS 器件的源极/漏极材料:外延 Si、Ge、Ge 1-x Sn x和 Si y Ge 1-xy Sn x 中的磷激活

本文对基于 n 型 IV 族材料的各种外延生长方案进行了基准测试,作为 Ge nMOS 器件的可行源/漏候选。Si:P 在 Ge 上低温生长,活性载流子浓度高达 3.5 x 1020 cm-3,接触电阻率低至 7.5 x10-9 Ω.cm2。然而,由于 Si 和 Ge 之间的大晶格失配,Si:P 生长非常有缺陷。在评估的材料堆栈中,Ge nMOS 源极/漏极应力源的一种选择是在源极/漏极层级选择性生长的 n-SiyGe1-x-ySnx 顶部堆叠 Si:P,沉积在接触层,与文献中报道的 n-Ge 表面的 Si 钝化以实现低接触电阻率的概念 [K. 马滕斯等。应用程序 物理。Lett., 98, 013504 (2011)]。随着 P(或 As)掺杂的增加,活性载流子浓度的饱和是实现原始 Ge 或 SiyGe1-x-ySnx 低接触电阻率的主要瓶颈。我们专注于了解 P 掺杂的 Ge 和 Ge1-xSnx 合金中的各种掺杂剂失活机制。第一性原理模拟结果表明,Ge 和 Ge1-xSnx 中的 P 失活可以通过 P 簇和供体空位复合物来解释。正电子湮没光谱分析表明,P 掺杂的 Ge 和 Ge1-xSnx 中的掺杂剂失活主要是由于 Pn-V 和 SnmPn-V 簇的形成。第一性原理模拟结果表明,Ge 和 Ge1-xSnx 中的 P 失活可以通过 P 簇和供体空位复合物来解释。正电子湮没光谱分析表明,P 掺杂的 Ge 和 Ge1-xSnx 中的掺杂剂失活主要是由于 Pn-V 和 SnmPn-V 簇的形成。第一性原理模拟结果表明,Ge 和 Ge1-xSnx 中的 P 失活可以通过 P 簇和供体空位复合物来解释。正电子湮没光谱分析表明,P 掺杂的 Ge 和 Ge1-xSnx 中的掺杂剂失活主要是由于 Pn-V 和 SnmPn-V 簇的形成。
更新日期:2020-05-06
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