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Test Pattern Design for Plasma Induced Damage on Inter-Metal Dielectric in FinFET Cu BEOL Processes.
Nanoscale Research Letters ( IF 5.5 ) Pub Date : 2020-05-01 , DOI: 10.1186/s11671-020-03328-7
Chi Su,Yi-Pei Tsai,Chrong-Jung Lin,Ya-Chin King

High-density interconnects, enabled by advanced CMOS Cu BEOL technologies, lead to closely placed metals layers. High-aspect ratio metal lines require extensive plasma etching processes, which may cause reliability concerns on inter metal dielectric (IMD) layers. This study presents newly proposed test patterns for evaluating the effect of plasma-induced charging effect on the integrity of IMD between closely placed metal lines. Strong correlations between the plasma charging intensities and damages found in IMD layers are found and analyzed comprehensively.

中文翻译:

FinFET Cu BEOL工艺中等离子体诱导金属间介电层损坏的测试图案设计。

通过先进的CMOS Cu BEOL技术实现的高密度互连导致紧密放置的金属层。高纵横比的金属线需要大量的等离子蚀刻工艺,这可能会引起金属间电介质(IMD)层可靠性的问题。这项研究提出了新提出的测试模式,用于评估等离子体诱导的充电效应对紧密放置的金属线之间的IMD完整性的影响。发现并全面分析了等离子体充电强度与在IMD层中发现的损伤之间的强相关性。
更新日期:2020-05-01
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