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An improved charge‐sharing elimination pseudo‐domino logic
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2020-04-19 , DOI: 10.1002/cta.2798
Sapna Rani Ghimiray 1 , Preetisudha Meher 2 , Pranab Kishore Dutta 1
Affiliation  

In low‐power digital circuit, the deviation of node voltage from nominal value due to charge‐sharing leads to erroneous output. This problem is more prominent in domino logic when the device is scaled down. The scaling of the device involves scaling of threshold voltage, resulting in high leakage, less robustness and degradation in noise margin. The paper proposes an improved domino approach in terms of reduced leakage, low power dissipation and better noise margin. The stacking effect and pseudo buffer are used in precharge phase to control the gate‐to‐source voltage of pull‐down network for less power consumption and increase in performance in terms of speed of operation. A modified keeper is introduced to reduce the charge‐sharing problem. The proposed domino approach is tested against area overhead, ageing and process, voltage and temperature variation. The circuit is simulated using Cadence Virtuoso Spectre for 90 nm technology. The results obtained from the simulation represent the usefulness of the proposed circuit in terms of power dissipation, stability due to temperature variation, leakage due to temperature variation and delay. The result also shows that the circuit is less prone to charge redistribution problem that exist in domino circuit.

中文翻译:

改进的电荷共享消除伪domino逻辑

在低功率数字电路中,由于电荷共享,节点电压与标称值之间的偏差会导致输出错误。当器件按比例缩小时,此问题在多米诺逻辑中更为突出。器件的缩放涉及阈值电压的缩放,从而导致高泄漏,鲁棒性降低和噪声容限降低。本文提出了一种改进的多米诺骨牌方法,以减少泄漏,降低功耗和改善噪声容限。在预充电阶段使用堆叠效应和伪缓冲器来控制下拉网络的栅极至源极电压,以降低功耗并提高运行速度。引入了一种改进的保持器,以减少电荷共享问题。拟议的多米诺骨牌方法经过了面积开销,老化和过程的测试,电压和温度变化。使用Cadence Virtuoso Spectre对90 nm技术进行了电路仿真。从仿真中获得的结果在功率耗散,温度变化引起的稳定性,温度变化引起的泄漏和延迟方面代表了所提出电路的有用性。结果还表明,该电路不太容易出现多米诺电路中存在的电荷重新分布问题。
更新日期:2020-04-19
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