This paper describes REAP, a software-hardware approach that enables high performance sparse linear algebra computations on a cooperative CPU-FPGA platform. REAP carefully separates the task of organizing the matrix elements from the computation phase. It uses the CPU to provide a first-pass re-organization of the matrix elements, allowing the FPGA to focus on the computation. We introduce a new intermediate representation that allows the CPU to communicate the sparse data and the scheduling decisions to the FPGA. The computation is optimized on the FPGA for effective resource utilization with pipelining. REAP improves the performance of Sparse General Matrix Multiplication (SpGEMM) and Sparse Cholesky Factorization by 3.2X and 1.85X compared to widely used sparse libraries for them on the CPU, respectively.

中文翻译：

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稀疏线性代数的 CPU-FPGA 协同加速

本文介绍了 REAP，这是一种软硬件方法，可在 CPU-FPGA 协作平台上实现高性能稀疏线性代数计算。REAP 将组织矩阵元素的任务与计算阶段仔细分开。它使用 CPU 提供矩阵元素的第一遍重组，允许 FPGA 专注于计算。我们引入了一种新的中间表示，允许 CPU 将稀疏数据和调度决策传达给 FPGA。计算在 FPGA 上进行了优化，以通过流水线进行有效的资源利用。与 CPU 上广泛使用的稀疏库相比，REAP 将稀疏通用矩阵乘法 (SpGEMM) 和稀疏 Cholesky 分解的性能分别提高了 3.2 倍和 1.85 倍。