This research propose a VLSI based temperature to digital converter (TDC) which is implemented with the aid of CMOS technology whose precise functionality is to sense the temperature-dependent source-gate voltage (V_SG) of PMOS Transistor. It measures an inaccuracy of ±40 mK on 20 samples from one batch ranging between −60 °C to +60 °C temperature. This result is mainly due to the generation of pmos transistors drain currents which minimizes the spread in their gate to source voltages in addition to a PTAT digital circuit in support of the proper stretch in the pmos transistors emitter currents. The entire design has been implemented in 0.045 µm technology and draws a current of 0.3 µA which shows that the proposed TDC can be considered as ultra-low power device as the power consumed by it is 18.09E-12 W between the room temperatures of −60 °C to +60 °C. As per the accuracy of the proposed TDC the calibration cost can be reduced which would avoid the difficulty in the batch calibration. The supply voltage given to the device is 0.45 volts and a temperature inaccuracy of ±18 mk is achieved.

这项研究提出了一种基于VLSI的温度数字转换器（TDC），该温度转换器借助CMOS技术实现，其精确功能是感测温度相关的源极-栅极电压（V _SG）。它对一批温度范围为-60°C至+60°C的20个样品测量的误差为±40 mK。该结果主要归因于pmos晶体管的漏极电流的产生，除了PTAT数字电路支持pmos晶体管发射极电流的适当展宽外，它还使栅极至源极电压的扩散最小。整个设计采用0.045 µm技术实现，并消耗0.3 µA的电流，这表明所提议的TDC可以视为超低功率器件，因为它在−的室温之间消耗的功率为18.09E-12W。 60°C至+60°C。根据建议的TDC的准确性，可以减少校准成本，从而避免了批量校准的困难。提供给设备的电源电压为0。