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Drain-Source Synchronous Rectifier Oscillation Mitigation in Light-Load Conditions
IEEE Open Journal of Power Electronics Pub Date : 2019-12-27 , DOI: 10.1109/ojpel.2019.2962662
Oscar Yu , Cheng-Wei Chen , Chih-Shen Yeh , Jih-Sheng Lai

The increasing usage of LLC-type dc-dc converters in utility, automotive, and power distribution applications has led to a push for a further increase in the converter's operating load range and efficiency. The secondary-side rectifier remains one of the lossiest areas in the converter, alluring designers to synchronous rectification (SR). One method is drain-source SR for cyclically adaptive, closed loop SR. However, when utilized, a severe current oscillation can be observed. An increase in SR duty cycle results in an increase in conduction time of the SR channel over the body diode. This issue becomes increasingly prevalent due to the usage of wide band-gap MOSFETs with high reverse drops and low sensed signal strength. This results in a current oscillation effect, leading to inconsistent SR operation, output ripple, and high EMI. In this paper, the issue is root caused analyzed. A method of improving drain-source SR for light-load SR operation is proposed. The method is prototyped on an FPGA to alleviate the issue on a 600-V in /340-V out 2.5-kW LLC-DCX (DC transformer) power converter.

中文翻译:

轻载条件下的漏源同步整流器振荡抑制

在公用事业,汽车和配电应用中,LLC型DC-DC转换器的使用日益增加,这促使人们进一步提高转换器的工作负载范围和效率。次级侧整流器仍然是转换器中损耗最大的区域之一,使设计人员可以采用同步整流(SR)。一种方法是用于循环自适应闭环SR的漏极-源极SR。然而,当使用时,会观察到严重的电流振荡。SR占空比的增加会导致体二极管上SR通道的导通时间增加。由于使用具有高反向压降和低检测信号强度的宽带隙MOSFET,这个问题变得越来越普遍。这会导致电流振荡效应,从而导致不一致的SR操作,输出纹波和高EMI。本文对问题进行了根本原因分析。提出了一种改善轻载SR工作的漏源SR的方法。该方法在FPGA上原型化,以缓解600V时的问题 输入 / 340 V 输出2.5 kW LLC-DCX(DC变压器)电源转换器。
更新日期:2019-12-27
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