Considering the energy-cap problem in battery-powered devices, dynamic voltage and frequency scaling, and power gating represent the de-facto state-of-the-art actuators. However, the limited margin available to reduce the operating voltage, the impossibility to massively integrate such actuators on-chip together with their actuation latency force a revision of such design methodologies. We present an all-digital architecture and a design methodology that can effectively manage the energy-cap problem for CPUs and accelerators. Two quality metrics are put forward to capture the performance loss and the energy budget violations. We employed a vector processor supporting four hardware threads as representative usecase. Results show an average performance loss and energy cap violations limited to 2.9% and 3.8%, respectively. Compared with solutions employing the dynamic frequency scaling actuator, our all-digital architecture improves the energy-cap violations by $3\times $ while maintaining a similar performance loss.

中文翻译：

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用于通用加速器和 CPU 的全数字能量受限控制器

考虑到电池供电设备中的能量上限问题，动态电压和频率缩放以及功率门控代表了事实上最先进的执行器。然而，可用于降低工作电压的有限余量、无法将此类致动器大规模集成在芯片上以及它们的致动延迟迫使此类设计方法的修订。我们提出了一种全数字架构和一种设计方法，可以有效地管理 CPU 和加速器的能量上限问题。提出了两个质量指标来捕获性能损失和能量预算违规。我们采用了一个支持四个硬件线程的矢量处理器作为代表性用例。结果显示，平均性能损失和能源上限违规分别限制在 2.9% 和 3.8%。