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Post-Silicon Microarchitecture
IEEE Computer Architecture Letters ( IF 1.4 ) Pub Date : 2020-03-10 , DOI: 10.1109/lca.2020.2978841
Chanchal Kumar , Aayush Chaudhary , Shubham Bhawalkar , Utkarsh Mathur , Saransh Jain , Adith Vastrad , Eric Rotenberg

Microprocessors are designed to provide good general performance across a range of benchmarks. As such, microarchitectural techniques which provide good speedup for only a small subset of applications are not attractive when designing a general-purpose core. We propose coupling a reconfigurable fabric with the CPU, on the same chip, via a simple and flexible interface to allow post-silicon development of application-specific microarchitectures. The interface supports observation and intervention at key pipeline stages of the CPU, so that exotic microarchitecture designs (with potentially narrow applicability) can be synthesized in the reconfigurable fabric and seem like components that were hardened into the core.

中文翻译:


后硅微架构



微处理器旨在在一系列基准测试中提供良好的总体性能。因此,在设计通用内核时,仅为一小部分应用程序提供良好加速的微架构技术并不具有吸引力。我们建议通过简单灵活的接口将可重构结构与 CPU 在同一芯片上耦合,以允许硅后开发特定于应用的微架构。该接口支持对 CPU 关键管道阶段的观察和干预,因此可以在可重新配置的结构中合成奇异的微架构设计(具有潜在的狭窄适用性),并且看起来像是硬化到核心中的组件。
更新日期:2020-03-10
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