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Size effect of electronic properties in highly arsenic-doped silicon nanowires
Solid-State Electronics ( IF 1.7 ) Pub Date : 2019-11-26 , DOI: 10.1016/j.sse.2019.107724
Tom Mauersberger , Imad Ibrahim , Matthias Grube , André Heinzig , Thomas Mikolajick , Walter M. Weber

The unique electrostatic properties of semiconductor nanowires enable the realization of novel transistor types by the possibility to use surround gate architectures resembling ideal gate electrostatic control. Nevertheless one fundamental issue of semiconducting nanowire channels is the reliable control of doping to adjust the charge carrier concentration. Indeed, as dimensions scale down the surrounding media and the interfaces become more important. In this study we experimentally investigate the role of surface depletion and dielectric mismatch on the electronic charge transport of highly arsenic doped and bottom-up grown silicon nanowires. Electrical characterization of silicon nanowires (SiNWs) synthesized by Au catalyzed vapour-liquid-solid (VLS) growth and in-situ arsine (AsH3) doping is reported for the first time. We demonstrate that high n-type doping is possible by adjusting the dopant precursor flow ratio during growth. Based on electrical measurements of individual nanowires, reproducible donor concentrations of up to 5.2 × 1019 cm−3 could be revealed. By measuring the electrical characteristics for individual nanowires in dependence of their radius, we show that the electrically active carrier density drastically reduces for small nanowires at radii much larger than those at which quantization or dopant surface segregation effects are expected to occur. Furthermore, enhancement of the contact transparency for small radii nanowires is demonstrated through dopant segregation upon metal silicidation. Size dependent measurement of electrical characteristics revealed improved contact resistivities as low as 1.4 × 10−11 Ωm2.



中文翻译:

高砷掺杂硅纳米线中电子性能的尺寸效应

半导体纳米线的独特静电特性通过使用类似于理想栅极静电控制的环绕栅架构,可以实现新型晶体管类型。然而,半导体纳米线沟道的一个基本问题是掺杂的可靠控制以调节电荷载流子浓度。实际上,随着尺寸的缩小,周围的媒体和界面变得越来越重要。在这项研究中,我们实验研究了表面耗尽和介电失配在高砷掺杂和自底向上生长的硅纳米线的电子电荷传输中的作用。Au催化蒸气-液-固(VLS)生长和原位砷化氢(AsH 3)合成的硅纳米线(SiNWs)的电学表征)首次报告了掺杂。我们证明了通过调节生长过程中掺杂剂前驱体的流量比可以实现高n型掺杂。根据单个纳米线的电学测量,可重复的供体浓度高达5.2×10 19  cm -3可以被揭露。通过测量单个纳米线的电特性取决于它们的半径,我们表明,对于小的纳米线,其电活性载流子密度会大大降低,其半径要比预期发生量化或掺杂剂表面偏析的半径大得多。此外,通过在金属硅化时的掺杂剂隔离证明了对小半径纳米线的接触透明性的增强。的电气特性的尺寸相关的测量揭示的改进的接触电阻低到1.4×10 -11  Ωm的2

更新日期:2019-11-26
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