This paper describes a two-way time interleaved 12-bit SAR ADC with 6-bit MSBs sharing technique. The proposed 12-bit SAR ADC consists of two SAR ADCs connected in parallel, so that the sampling rate can be doubled. The first 12-bit SAR ADC is employed to determine the 12 bits and the second 12-bit SAR ADC utilizes the upper 6-bits of the first one, so that it can determine the lower 6-bits and save switching energy. The proposed two-way time interleaved 12-bit SAR ADC is implemented with a CMOS 180 nm 1-poly 6-metal process. The measurement results demonstrate ENOB of 10.2 bits, SNDR of 62.9 dB, power consumption of 69 μW, INL/DNL of ± 1.8 LSB, and Walden FoM of 5.9 fJ/step.

本文介绍了一种具有6位MSB共享技术的双向时间交织12位SAR ADC。提议的12位SAR ADC由两个并联的SAR ADC组成，因此采样率可以加倍。第一个12位SAR ADC用于确定12位，第二个12位SAR ADC利用第一个12位SAR ADC的高6位，从而可以确定低6位并节省开关能量。拟议的双向时间交错12位SAR ADC是采用CMOS 180 nm 1-poly 6-metal工艺实现的。测量结果表明，ENOB为10.2位，SNDR为62.9 dB，功耗为69μW，INL / DNL为±1.8 LSB，Walden FoM为5.9 fJ / step。