In this work, we have systematically compared different factors of the bipolar incremental step pulse programming (ISPP) method in a one-transistor-one-resistor (1T1R) structure to lower the forming bias of RRAM, and also investigated the limitation of the forming voltage induced by the gate voltage of the transistor. Finally, we applied bipolar ISPP at high temperatures to further reduce the forming voltage. The experimental results show that the forming voltage has effectively been reduced without additional degradation to device performance according to reliability tests. This provides a feasible method to consider the issues of the reduction of the forming voltage.

中文翻译：

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将双极增量步进脉冲编程与热成型相结合，以降低1T1R结构电阻随机存取存储器中的成型电压

在这项工作中，我们系统地比较了单极一电阻（1T1R）结构中双极增量步进脉冲编程（ISPP）方法的不同因素，以降低RRAM的形成偏置，并研究了形成的局限性由晶体管的栅极电压感应的电压。最后，我们在高温下应用了双极ISPP，以进一步降低成形电压。实验结果表明，根据可靠性测试，有效降低了成型电压，而不会进一步降低器件性能。这提供了一种考虑降低成形电压的问题的可行方法。