Static random access memory (SRAM)-based ternary content-addressable memory (TCAM) on field-programmable gate arrays (FPGAs) is used for packet classification in software-defined networking (SDN) and OpenFlow applications. SRAMs implementing TCAM contents constitute the major part of a TCAM design on FPGAs, which are vulnerable to soft errors. The protection of SRAM-based TCAMs against soft errors is challenging without compromising critical path delay and maintaining a high search performance. This brief presents a low-cost and low-response-time technique for the protection of SRAM-based TCAMs. This technique uses simple, single-bit parity for fault detection which has a minimal critical path overhead. This technique exploits the binary-encoded TCAM table maintained in SRAM-based TCAMs for update purposes to implement a low-response-time error-correction mechanism at low cost. The error-correction process is carried out in the background, allowing lookup operations to be performed simultaneously, thus maintaining a high search performance. The proposed technique provides protection against soft errors with a response time of 293 ns, whereas maintaining a search rate of 222 million searches per second on a $1024\times40$ size TCAM on Artix-7 FPGA.

中文翻译：

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ER-TCAM：一种用于 FPGA 的基于软错误弹性 SRAM 的三元内容可寻址存储器

现场可编程门阵列 (FPGA) 上基于静态随机存取存储器 (SRAM) 的三元内容可寻址存储器 (TCAM) 用于软件定义网络 (SDN) 和 OpenFlow 应用程序中的数据包分类。实现 TCAM 内容的 SRAM 构成了 FPGA 上 TCAM 设计的主要部分，易受软错误影响。在不影响关键路径延迟和保持高搜索性能的情况下，保护基于 SRAM 的 TCAM 免受软错误的影响具有挑战性。本简介介绍了一种用于保护基于 SRAM 的 TCAM 的低成本和低响应时间技术。该技术使用简单的单比特奇偶校验进行故障检测，其具有最小的关键路径开销。该技术利用基于 SRAM 的 TCAM 中维护的二进制编码 TCAM 表进行更新，以低成本实现低响应时间纠错机制。纠错过程在后台进行，允许同时进行查找操作，从而保持较高的搜索性能。所提出的技术以 293 ns 的响应时间提供针对软错误的保护，同时在 Artix-7 FPGA 上的 1024 美元/40 美元大小的 TCAM 上保持每秒 2.22 亿次搜索的搜索率。