This brief presents a cost-efficient all-digital CMOS digital-to-time converter (DTC) that innovatively applies binary-weighted pulse expansion. The DTC consists of a pulse generator (PG) for pulse generation ( $t_{p}$ ), a binary-weighted pulse-expanding circuit (BWPEC) as a main circuit for digital-to-time conversion, and a time subtractor (TS) for $t_{p}$ removal. Compared with the original pulse-expanding unit (PEU), a novel PEU with reduced complexity and a linear pulse expansion was developed for binary-weighted operation. The use of the BWPEC with the binary-weighted PEUs exhibits lower circuit complexity and considerably reduces the circuit cost compared to the original unary-weighted pulse-expanding circuit (PEC). A prototype of the 4-bit all-digital DTC was fabricated using a Taiwan Semiconductor Manufacturing Company (TSMC) 0.35- $\mu \text{m}$ CMOS process. The fabricated DTC exhibited an area of 0.02 mm² achieving twofold improvement considerably. The measured resolution was approximately 5 ps, with the integral nonlinearity being −1.2–1 least significant bit (LSB). Without requiring an advanced CMOS process, the pulse variation technique with a simple structure can easily achieve fine resolution. The DTC features cost-efficient pulse expansion with binary weights and low circuit complexity.

中文翻译：

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使用二进制加权脉冲扩展的全数字经济型 CMOS 数字时间转换器

本简介介绍了一种具有成本效益的全数字 CMOS 数字时间转换器 (DTC)，它创新地应用了二进制加权脉冲扩展。DTC 由一个脉冲发生器 (PG) 组成，用于产生脉冲 ( $t_{p}$ )，一个二进制加权脉冲扩展电路 (BWPEC) 作为数字到时间转换的主电路，以及一个时间减法器 (TS) $t_{p}$ 移动。与原始脉冲扩展单元（PEU）相比，开发了一种复杂度降低且线性脉冲扩展的新型 PEU，用于二进制加权操作。与原始一元加权脉冲扩展电路 (PEC) 相比，BWPEC 与二进制加权 PEU 的使用表现出较低的电路复杂性并显着降低了电路成本。4 位全数字 DTC 的原型是使用台积电 (TSMC) 0.35- $\mu \text{m}$ CMOS工艺。制造的 DTC 的面积为 0.02 mm ^2，显着实现了两倍的改进。测量的分辨率约为 5 ps，积分非线性为 -1.2–1 最低有效位 (LSB)。不需要先进的CMOS工艺，结构简单的脉冲变化技术可以轻松实现精细分辨率。DTC 具有成本效益高的脉冲扩展，具有二进制权重和低电路复杂性。