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Embedding Approximate Nonlinear Model Predictive Control at Ultrahigh Speed and Extremely Low Power
IEEE Transactions on Control Systems Technology ( IF 4.9 ) Pub Date : 2019-03-01 , DOI: 10.1109/tcst.2019.2898835
Arnab Raha , Ankush Chakrabarty , Vijay Raghunathan , Gregery T. Buzzard

Embedded systems require control algorithms that are safe and able to operate in embedded platforms with extreme limitations on energy, memory, and area footprint. Nonlinear model predictive control (NMPC) algorithms respect operational constraints to ensure safety but are typically challenging to implement on resource-constrained embedded systems at high speeds. This brief introduces a formalism for deploying an approximate NMPC control law on severely resource-constrained hardware by systematically leveraging approximate computing tools. The resulting field-programmable gate array (FPGA) implementation operates at extremely low power, is ultrafast, requires very small on-chip area, and consumes lower memory than cutting-edge implementations of embedded NMPC for systems of similar state-space dimension. Feasibility and stability guarantees are provided for the embedded controller by preemptively bounding the allowable approximation error in the hardware design phase. An FPGA-in-the-loop implementation exhibits speeds in nanosecond range with power consumption in <1 mW for 2-D and 3-D nonlinear systems.

中文翻译:

嵌入超高速和超低功耗的近似非线性模型预测控制

嵌入式系统需要安全且能够在嵌入式平台上运行的控制算法,而这些平台在能源,内存和面积方面都受到极大限制。非线性模型预测控制(NMPC)算法遵守操作约束条件以确保安全性,但通常难以在资源受限的嵌入式系统上高速实现。本简介介绍了通过系统地利用近似计算工具在资源严重受限的硬件上部署近似NMPC控制律的形式主义。与类似状态空间尺寸的系统的嵌入式NMPC的最新实现相比,最终的现场可编程门阵列(FPGA)实现以极低的功耗运行,超快,需要非常小的片上面积并且消耗的内存更少。通过在硬件设计阶段预先限制可允许的近似误差,为嵌入式控制器提供了可行性和稳定性保证。对于2D和3D非线性系统,FPGA回路实现的速度在纳秒范围内,功耗小于1 mW。
更新日期:2020-04-22
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