In harsh radiation environments, nanoscale CMOS latches have become more and more vulnerable to triple-node upsets (TNUs). This paper first proposes a latch design that can self-recover from any possible TNU for aerospace applications in the 16-nm CMOS technology. The proposed latch is mainly constructed from seven mutually feeding-back soft-error-interceptive modules (SIMs), any of which consists of two three-input C-elements and one two-input C-element. Due to the mutual feedback mechanism of SIMs and the dual-level soft-error interception of each SIM, the latch can self-recover from any possible TNU. Simulation results demonstrate the TNU self-recoverability from any key TNU for the proposed latch using redundant silicon area. Furthermore, using a high-speed path, the proposed latch saves about 95.45% transmission delay and 86.97% delay-power-area product, compared with the state-of-the-art TNU-tolerant latch that cannot provide complete TNU self-recoverability at all.

中文翻译：

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用于恶劣辐射环境中航空航天应用的三节点翻转自恢复锁存器的设计

在恶劣的辐射环境中，纳米级 CMOS 锁存器越来越容易受到三节点翻转 (TNU) 的影响。本文首先提出了一种锁存器设计，它可以从任何可能的 TNU 中自我恢复，用于 16 纳米 CMOS 技术的航空航天应用。所提出的锁存器主要由七个相互反馈的软错误拦截模块 (SIM) 构成，其中任何一个都由两个三输入 C 元素和一个二输入 C 元素组成。由于 SIM 的互反馈机制和每个 SIM 的双级软错误拦截，锁存器可以从任何可能的 TNU 中自我恢复。仿真结果证明了使用冗余硅区域的建议锁存器从任何关键 TNU 的 TNU 自我恢复能力。此外，使用高速路径，所提出的锁存器节省了大约 95.45% 的传输延迟和 86%。