As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics. The impact of cycling induced intercell trapped charge on two primary charge loss mechanisms (vertical and lateral charge loss) was studied in this work. According to experimental analysis and TCAD simulation, it is found that, in vertically scaled 3D NAND, the vertical charge loss is deteriorated not only by the cycling induced tunnel oxide degradation (introducing interface/oxide traps), but also by the cycling induced intercell trapped charge (enhancing word-lines edge electric field), on account of the enhanced Poole-Frenkel effect and tunneling effect. On the other hand, the cycling induced intercell trapped charge can also suppress lateral charge migration. Therefore, the vertical charge loss, rather than the lateral charge migration, still can be the dominant factor for post-cycling retention characteristics in scaling Lg/Ls 3D NAND flash memory.

中文翻译：

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循环引起的单元间俘获电荷对 3D NAND 闪存中保留电荷损失的影响

随着 3D NAND 技术向越来越多的堆叠层发展，缩小栅极长度 (Lg) 和栅极间距 (Ls) 至关重要。然而，缩放 Lg/Ls 3D NAND 闪存的关键问题之一是循环后数据保留特性。在这项工作中研究了循环诱导的电池间俘获电荷对两种主要电荷损失机制（垂直和横向电荷损失）的影响。根据实验分析和 TCAD 模拟发现，在垂直缩放的 3D NAND 中，垂直电荷损失不仅因循环引起的隧道氧化物退化（引入界面/氧化物陷阱）而恶化，而且循环引起的单元间被困电荷（增强字线边缘电场），由于增强的 Poole-Frenkel 效应和隧道效应。另一方面，循环诱导的胞间俘获电荷也可以抑制横向电荷迁移。因此，垂直电荷损失，而不是横向电荷迁移，仍然是缩放 Lg/Ls 3D NAND 闪存的循环后保留特性的主要因素。