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A semi-custom design methodology and environment for implementing superconductor adiabatic quantum-flux-parametron microprocessors
Superconductor Science and Technology ( IF 3.7 ) Pub Date : 2020-03-30 , DOI: 10.1088/1361-6668/ab7ec3
Christopher L Ayala 1 , Ro Saito 2 , Tomoyuki Tanaka 2 , Olivia Chen 1 , Naoki Takeuchi 1 , Yuxing He 1 , Nobuyuki Yoshikawa 1, 2
Affiliation  

We present a comprehensive overview of a design methodology and environment that we developed to enable the implementation of microprocessors and other complex logic circuits using the adiabatic quantum-flux-parametron (AQFP) superconductor logic family. The design environment is catered for both the AIST 10 kA cm −2 Nb high-speed standard process as well as the AIST 2.5 kA cm −2 Nb standard process (STP2). We detail each aspect of the design flow, highlighting improvements in cell design, and new developments in circuit retiming to reduce the number of synchronizing buffers in the circuit datapath. With retiming, we expect a 14–37% reduction in the overall Josephson junction (JJ) count for some benchmarks. Finally, we show the successful experimental demonstration of an arithmetic logic unit and data shifter for an AQFP microprocessor using the established methodology and environment. The demonstrated circuits show full functionality and wide excitation curr...

中文翻译:

实现超导体绝热量子通量参量微处理器的半定制设计方法和环境

我们将全面介绍我们开发的设计方法和环境,以使用绝热量子通量参量(AQFP)超导体逻辑系列来实现微处理器和其他复杂的逻辑电路。设计环境既适合AIST 10 kA cm -2 Nb高速标准工艺,又适合AIST 2.5 kA cm -2 Nb高速标准工艺(STP2)。我们详细介绍了设计流程的各个方面,重点介绍了单元设计方面的改进以及电路重排的新进展,以减少电路数据路径中的同步缓冲区数量。通过重新计时,我们预计某些基准测试的约瑟夫逊交汇点(JJ)总数将减少14-37%。最后,我们使用已建立的方法和环境,成功地演示了AQFP微处理器的算术逻辑单元和数据移位器的实验演示。演示电路显示了完整的功能和宽泛的激励电流。
更新日期:2020-04-22
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