Transmission lines and rotating machines that widely exist in power systems should be accurately modeled in real-time electromagnetic transient (EMT) simulation for obtaining precise results for hardware-in-the-loop applications. In the conventional EMT simulator, the time-step is fixed, which may lead to inefficiencies when the time constants of the system change. The adaptive time-stepping (ATS) method can efficaciously solve this problem; however, the ATS schemes for the universal transmission line model (ULM) and universal machine (UM) model remain to be investigated. This article derives the ATS models for ULM and UM, and the proposed ULM model is more stable than the traditional model. Both ATS models are emulated on the parallel and pipelined architecture of the field-programmable gate array (FPGA). The proposed subsystem-based ATS scheme and the local truncation error (LTE) based time-step control enable the large-scale systems to be simulated in real time and “faster-than-real-time” modes. The IEEE 39-bus system with ATS models is emulated on two interconnected FPGA boards, and the emulation results compared with PSCAD/EMTDC and fixed time-stepping (FTS) hardware emulator verify the effectiveness of the proposed models and show that the LTE of ULM and UM can be reduced by 76.5% and 62.0%, respectively, compared with the FTS simulation.

中文翻译：

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用于实时和超实时硬件仿真的自适应时间步进通用线路和机器模型

电力系统中广泛存在的传输线和旋转电机应在实时电磁瞬态 (EMT) 仿真中准确建模，以获得硬件在环应用的精确结果。在传统的 EMT 模拟器中，时间步长是固定的，当系统的时间常数发生变化时，这可能会导致效率低下。自适应时间步长（ATS）方法可以有效地解决这个问题；然而，通用传输线模型（ULM）和通用机器（UM）模型的 ATS 方案仍有待研究。本文推导了 ULM 和 UM 的 ATS 模型，所提出的 ULM 模型比传统模型更稳定。两种 ATS 模型都在现场可编程门阵列 (FPGA) 的并行和流水线架构上进行仿真。所提出的基于子系统的 ATS 方案和基于本地截断误差 (LTE) 的时间步长控制使大规模系统能够实时和“比实时更快”的模式进行仿真。在两个互连的 FPGA 板上仿真了具有 ATS 模型的 IEEE 39 总线系统，仿真结果与 PSCAD/EMTDC 和固定时间步进（FTS）硬件仿真器相比验证了所提出模型的有效性，并表明 ULM与 FTS 模拟相比，UM 和 UM 可以分别减少 76.5% 和 62.0%。